threadx Snapshot
  • Small-footprint (small as 2KB, automatic scaling)
  • Fast execution (sub microsecond context switch)
  • Supports all popular processors and tools (see below)
  • TraceX system analysis support
  • Advanced Technology:
    • Preemption-Threshold™
    • Event Chaining™
    • Performance Metrics
    • Execution Profiling
    • Run-time and Static Stack Analysis
    • Multicore Support (SMP and AMP)
    • Downloadable Application Modules
    • Memory Protection for Downloadable Application Modules
  • Extensive ThreadX ecosystem
  • Safety Certifications (DO-178B, FDA510(k), IEC61508, etc)
  • Deployed in over 1,000,000,000 devices
  • Full Source Code
  • Royalty-Free
threadx Processor Support

MIPS

ThreadX for MIPS

Highlights

  • Complete MIPS family support, including MIPS32® 4K™, 24K™, 34K™, 74K™, 1004K™, interAptiv™, M14K/c, and MIPS64® 5K™
  • Hard Real-Time Multithreading/SMP support for MIPS 34K, 1004K, interAptiv;
  • Reasonable pricing
  • No Royalties
  • Complete ANSI C source code
  • Easy to use and powerful services
  • Responsive Technical Support
  • Unlimited Threads, Queues, Event Flags, Timers, Semaphores, Mutexes, Block Pools, and Byte Pools
  • Flexible memory usage
  • Timeout available on all thread suspension
  • Advanced preemption-threshold technique
  • Low-overhead Application Timers
  • Size scales automatically
  • picokernel architecture for size and speed
  • Small footprint (as low as 6 Kbytes)
  • Fast Execution (2.1 us context switch on 40MHz, MIPS32 4Ke)
  • Improve Your MIPS Development

    Let our extensive experience with the MIPS family of microprocessors help your product development. ThreadX, our high-performance real-time kernel, helps improve your product's quality and its time-to-market. In addition, using ThreadXmakes it easier to enhance your product in the future.

    MIPS Optimizations

    ThreadX optimizes context switching on the R3000. When context switching occurs inside of a ThreadX service call, only the registers preserved across functioncalls are saved as part of the thread's context, i.e. registers s0-s8.

    A similar technique is used in interrupt handling. On the front end of interrupt service routines, only the compiler's scratch registers are saved initially (registers at, v0-v1, a0-a3, and t0-t9). The full register set is saved only if thread preemption is required.

    Easy to Use

    ThreadX is designed for ease of use. Our API is designed to be easy to understand, powerful, and consistent. The same is true with our reference manual and othersupporting documentation.

    Development Tool Choices

    ThreadX is completely compatible with all major MIPS development tools, including MIPS’s SDE, Wind River’s Workbench™, Green Hills MULTI®,and GNU.

    Free Demo Downloads

    MIPS32 4kx
  • ThreadX_5.3_mips32_4Kx_gnu_malta
  • MIPS32 24kx
  • ThreadX_5.3_mips32_24Kx_gnu_malta