- Small-footprint (small as 2KB, automatic scaling)
- Fast execution (sub microsecond context switch)
- Supports all popular processors and tools (see below)
- TraceX system analysis support
- Advanced Technology:
- Preemption-Threshold™
- Event Chaining™
- Performance Metrics
- Execution Profiling
- Run-time and Static Stack Analysis
- Multicore Support (SMP and AMP)
- Downloadable Application Modules
- Memory Protection for Downloadable Application Modules
- Extensive ThreadX ecosystem
- Safety Certifications (DO-178B, FDA510(k), IEC61508, etc)
- Deployed in over 1,000,000,000 devices
- Full Source Code
- Royalty-Free
- ARM
- Atmel
- BlackFin
- CEVA-TeakLite-III
- ColdFire/68K
- Critical Link MityDSP/MityARM
- Energy Micro EFM32
- Freescale
- Fujitsu FM3
- G-Series
- Hitachi H8/300H
- Infineon XMC
- Leon3
- M-CORE
- MicroBlaze
- Microchip PIC24/dsPIC
- Microchip PIC32
- MIPS
- Nios II
- NXP
- Power Architecture
- Renesas RX
- Renesas SH
- Renesas V8xx
- SHARC
- ST Microelectronics STM32
- StarCore
- StrongARM
- Synopsys ARC
- TI ARM
- TI MSP430
- TMS320C54x
- TMS320C6x
- Univers A2P
- Win32
- x86/x386
- Xilinx ARM
- XScale
- Xtensa/Diamond
Renesas SH
ThreadX for Renesas SH
Highlights
Complete SuperH family support, including SH1, SH2, SH2A, SH3, SH4, SH4A, and SH-DSP Reasonable pricing No Royalties Complete ANSI C source code Easy to use and powerful services Responsive Technical Support Unlimited Threads, Queues, Event Flags, Timers, Semaphores, Mutexes, Block Pools, and Byte Pools Flexible memory usage Timeout available on all thread suspension Advanced preemption-threshold technique Low-overhead Application Timers Size scales automatically picokernel architecture for size and speed Small footprint (as low as 3 Kbytes) Fast Execution (1.8 us context switch@20MHz, 0 wait-states, SH3)
Improve Your SuperH Development
Let our extensive experience with the Renesas SH family of microprocessors help your product development. ThreadX, our high-performance real-time kernel, helps improve your product's quality and its time-to-market. In addition, using ThreadX makes it easier to enhance your product in the future.
SH Optimizations
ThreadX optimizes context switching on the Renesas SH. When context switching occurs inside of a ThreadX service call, only the registers preserved across function calls are saved as part of the thread's context, i.e. registers R8-R14, PR, MACH and MACL.
A similar technique is used in interrupt handling. On the front end of interrupt service routines, only the compiler's scratch registers are saved initially (registers R0-R7). The full register set is saved only if thread preemption is required.
Further Optimizations for SH3
ThreadX is further optimized for the SH3. Register Bank 1 (BANK1) is used on the front-end of interrupt context saving for improved performance. When initial context saving is done, Register Bank 0 is available for use - including nested interrupts.
Development Tool Choices
ThreadX is completely compatible with all the major Renesas SH development tools, including HEW, GNU, and Green Hills MULTI development tools. Additional ThreadX-aware debugging is available with MULTI from Green Hills.
Free Demo Downloads
SH2AThreadX SH7263 - HEW Tools ThreadX SH7670 - HEW Tools ThreadX_SH7216 – HEW Tools
