threadx Snapshot
  • Small-footprint (small as 2KB, automatic scaling)
  • Fast execution (sub microsecond context switch)
  • Supports all popular processors and tools (see below)
  • TraceX system analysis support
  • Advanced Technology:
    • Preemption-Threshold™
    • Event Chaining™
    • Performance Metrics
    • Execution Profiling
    • Run-time and Static Stack Analysis
    • Multicore Support (SMP and AMP)
    • Downloadable Application Modules
    • Memory Protection for Downloadable Application Modules
  • Extensive ThreadX ecosystem
  • Safety Certifications (DO-178B, FDA510(k), IEC61508, etc)
  • Deployed in over 1,000,000,000 devices
  • Full Source Code
  • Royalty-Free
threadx Processor Support

TI MSP430

ThreadX for TI MSP430

Highlights

  • Complete MSP430 support
  • IAR Embedded Workbench Development Tool Support
  • Reasonable pricing
  • No Royalties
  • Complete ANSI C source code
  • Easy to use and powerful services
  • Responsive Technical Support
  • Unlimited Threads, Queues, Event Flags, Timers, Semaphores, Mutexes, Block Pools, and Byte Pools
  • Flexible memory usage
  • Timeout available on all thread suspension
  • Advanced preemption-threshold technique
  • Low-overhead Application Timers
  • Size scales automatically
  • Picokernel architecture for size and speed
  • Small footprint (as low as 4 Kbytes)
  • Fast Execution (2.7us context switch@25MHz)
  • Improve Your MSP430 Development

    Let our extensive experience with the MSP430 family of microprocessors help your product development. ThreadX, our high-performance real-time kernel, helps improve your product's quality and its time-to-market. In addition, using ThreadX makes it easier to enhance your product in the future.

    MSP430 Optimizations

    ThreadX optimizes context switching on the MSP430. When context switching occurs inside of a ThreadX service call, only the registers preserved across function calls are saved as part of the thread's context, i.e. registers r4-r11.

    A similar technique is used in interrupt handling. On the front end of interrupt service routines, only the compiler's scratch registers are saved initially (registers r12-r15). The full register set is saved only if thread preemption is required.

    Nested Interrupt Handling

    ThreadX can also be configured to support nested interrupt handling.